When a unit (e.g., load unit or store unit) misses in a set associative cache, it allocates an entry from one of the ways of the selected set in the cache. The cache allocates the way indicated by a vector that indicates a replacement scheme, which is commonly a pseudo-LRU (PLRU) vector. The cache must update the PLRU vector or else next time it performs an allocation, it will allocate the same way. Sometimes two units (e.g., load unit and store unit) miss in the cache and initiate allocations at the same time. Three problems must be solved in this case. First, it is desirable to ensure that the same way is not allocated to both units or else one will immediately kick out the other that was just allocated, which is not beneficial to performance. Second, to avoid degrading performance, it is beneficial to update the PLRU in such a way that either of the newly allocated ways is not soon allocated. Third, it is desirable to solve the first two problems with logic that does so as quickly as possible in order to avoid creating a timing problem with the solution.